DDR1 to DDR4, LPDDR1 to LPDDR4

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DDR1 to DDR4, LPDDR1 to LPDDR4

  • DDR1 to DDR4, LPDDR1 to LPDDR4 Training

    • DDR memory organization
    • DDR addressing
    • Channels, Ranks, Banks, Rows and Columns
    • DDR evolution
    • DDR Interface signals
    • DDR commands, timing diagrams
    • DDR Mode registers
    • DDR clock frequency, limitation
    • DDR initialization and power up sequence
    • DDR Training: Write levelling, Read training, CA Training, ZQ Calibration
    • DDR calibration
    • ODT
    • LP, PC DDR’s

    DDR PHY basics

    • Architecture
    • Sub components

    DDR Controller concepts

Term DDR in resume opens up quite a few job opportunities!!..that is the importance of DDR in current SoC’s..

DDR is an essential component of every complex SOC. It requires every engineer working on SoC to be well versed with DDR protocol concepts including DDR controller, DDR PHY, DDR memory, etc. The course focus on teaching DDR3, DDR4, timing diagrams, training sequence, DDR controller design concepts and DDRPHY concepts.

DDR Training (VG-DDR) Schedule

  • Next Batch:Adhoc(based on minimum number of students enrolling for the course)
    • Currently there is no live sessions planned. You may enroll for e-learning courses for self-paced learning, with option to join upcoming batch with no additional cost. Trainer will be accessible for doubt clarifications.
  • Duration: 6 weeks
  • eLearning: INR 7,500 +GST at 18%
  • Live Training : INR 9,000 +GST at 18%
  • Certificate of course completion

Registration:

  • Attend Demo Session before registering for course
Course Registration
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Course Highlights
  • 1-1 Dedicated Mentor Support
  •  24/7 Tool Access
  • Multiple mock interviews
  • Industry Standard Projects
  • Support with resume update