USB2.0 Core Verification using SV & UVM

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USB2.0 Core Verification using SV and UVM

  • USB2.0 overview
    • LS, FS, HS
  • USB topology
    • components
  • EHCI, UHCI, OHCI
  • USB2.0 features
    • USB reset
    • Device detection
    • Speed negotiation
    • Enumeration
    • Device descriptors
  • Line states
  • Data transfers
  • USB core operation
  • USB frame
  • USB packets
    • Token
    • Data
    • Handshake
    • Special
    • New packets in high speed
  • USB transfer types
    • Control transfers
    • Interrupt transfers
    • Isochronous transfers
    • Bulk transfers
  • Split transactions
  •  
  • Reading USB2.0 core specification
    • Feature and scenario listing down
    • Test plan development
    • Functional coverage point listing down
  • Testbench architecture
    • Testbench component coding
    • Testbench integration
  • Register listing down
    • Register fields, attributes
    • Developing register model in UVM
  • Register model integration in to TB environment
  • Sanity Test case coding
  • Register access test case coding using register model
    • Register reset test
    • Register write read test
    • Front door and back door access tests
    • Test case debug
  • Functional testcase coding
  • Testcase debug
  • Regression setup
  • Report generation and coverage report analysis
    • Functional coverage analysis
    • Code coverage analysis
 

USB2.0 core is part of USB device, used to interface with USB function on one side and USB host on other side using UTMI. USB2.0 course includes detailed training on USB2.0 protocol including LS, FS and HS, with detailed understanding on frame, packet format.

USB2.0 core verification is done using SV and UVM starting from reading of specification, test bench setup, test case coding, regression set up and debug.

It is useful for working professionals to gain expertise on entire verification flow for a complex design.

CourseUniversal Memory Controller
Duration4 weeks
Next Batch  
Mode of Training

Classroom training at Institute(ORR, Banaswadi),

Online training using live training sessions

Fee

eLearning: INR 7,000 +GST at 18%

Live Training: INR 8,000 +GST at 18%

CertificateIssued based on 50% assignment completion as criteria
Trainer12+ Years exp in RTL design & Functional verification
Course Registration
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Course Highlights
  • 1-1 Dedicated Mentor Support
  •  24/7 Tool Access
  • Multiple mock interviews
  • Industry Standard Projects
  • Support with resume update